Publisher: Supplier of LED Display Time: 2022-03-04 14:41 Views: 620
Why do small-pitch LED displays need a splicer?
A key application of the splicer is that it can output multiple DVI signals to splicing and display multiple displays arranged in a matrix, making it a logically complete display area.
For the LED display, we can define the display area driven by an LED controller as an independent LED display. The current LED controller uses DVI/HDMI as the signal input interface, and the maximum input resolution supported is 1920×1200@60Hz, the maximum bandwidth is 165MHz, and the maximum physical resolution of the driven LED display is 1920×1200.
With the increasing display area of LED small-pitch products, projects of tens of square meters are not uncommon, and the physical resolution of LED displays often exceeds 1920×1200, that is, each ultra-large LED display is composed of several It is composed of several independent display areas driven by each LED controller. For the application of the splicer, it is only necessary to provide several DVI output interfaces corresponding to the number of LED controllers, and to splicing and display the entire LED screen.
Requirements for Small Pitch LED Image Stitching Processors
(1) The synchronization of the output is guaranteed to avoid the phenomenon of out-of-sync splicing pictures;
(2) Optimize the image processing algorithm to keep the zoomed image high-definition;
(3) Customize the output resolution to deal with the irregular physical resolution of the LED display.
The key technology of small-pitch LED display splicer
(1) The output synchronization of the signal
The multi-channel DVI signal output of the splicer must have the problem of signal synchronization. When the asynchronous signal is output to the LED display, screen tearing will occur at the splicing point, especially when playing high-speed moving images. How to ensure the output synchronization of the signal becomes the key to measure the success or failure of a splicing system.
(2) Graphics processing algorithm
We know that the point-to-point image display effect is the best. If the image is reduced and processed, if only ordinary graphics processing technology or general FPGA graphics processing algorithm is used, the edges of the image will appear jagged, and even there will be pixel missing. The brightness will also decrease. However, high-end image processing chips or FPGA systems using complex graphics processing algorithms will maximize the display effect of the reduced image. Therefore, a good graphics processing algorithm is a key technology for a splicer applied to a small-pitch LED display.
(3) Non-standard resolution output
The small-pitch LED display is composed of a matrix of display units of the same specification. The size and physical resolution of each display unit are fixed, but the entire large screen spliced together is often not a standard physical resolution. For example, the resolution of the display unit is 128×96, which can only be spelled 1920×1152, but cannot be spelled 1920×1080. In a super large-scale splicing system, the LED display area driven by each LED controller may not be of standard resolution. At this time, the output of the splicer with non-standard resolution is crucial, which can help us quickly find a suitable The splicing method can reasonably allocate resources and effectively save the number of LED controllers and transmission equipment used.
Types of splicers used in small-pitch LED displays
At present, splicers can be divided into four categories, namely embedded pure hardware architecture, PCI-E bus architecture, distributed network architecture, and hybrid architecture.
(1) Embedded pure hardware architecture
The structure of the whole machine usually adopts the design of "backplane + signal acquisition board + main control board + signal output board". The signal acquisition board performs signal processing such as video acquisition, scaling, overlay, format conversion, etc. The processed signal is transmitted to the FPGA signal processing system of the main control board, and the functions of the main control FPGA configuration, communication with the upper PC, and data exchange between the systems are realized through the embedded ARM system, and the signal is output to the display terminal through the signal output board. .
The pure hardware architecture splicer has a relatively simple structure and is not prone to system failure; the acquisition board and output board are hot-swappable and easy to replace; it can realize the acquisition and processing of multi-channel and multi-format signals; backplane switching technology and output board The unified clock technology of the card ensures the synchronization of multiple signal outputs; the resolution of each DVI output signal can be customized, which is in line with the splicing characteristics of LED displays.
Many features make the pure hardware architecture quickly become one of the mainstream products in the field of splicer today. However, due to the use of FPGA as the core image processing unit, the quality of the algorithm determines the processing effect of a splicer, especially the image scaling algorithm, how to optimize to achieve a clearer display effect has become a judgment An important indicator of the value of a pure hardware splicer product.
(2) PCI-E bus architecture
Usually, the splicer of the bus architecture adopts PCI Express technology, and the available data bandwidth is as high as hundreds of Gbps. The host is equipped with high-performance CPU and large-capacity memory, and can be pre-installed with different operating systems (such as 64-bit Windows 7) according to different application fields, and can directly run various applications. The splicer is equipped with multiple high-performance graphics output cards, each with high internal bandwidth and video memory, and all output images are synchronized to eliminate image tearing between display units. At the same time, it is also equipped with multiple input cards, supports multiple signal formats, and can perform image processing on input signals.
The PCI-E bus architecture splicer is a high-performance computer. All components use the most advanced and mature technologies of major hardware manufacturers. For example, the CPU can be selected from Intel, and the graphics card can be selected from NVIDIA. All high and new technologies in the computer field can also be quickly integrated. This makes the PCI-E bus architecture splicer have incomparable advantages in terms of computing speed, image processing, and operation methods.
The threshold of PCI-E bus architecture splicer is very low. For simple applications, an industrial computer and a professional multi-channel output graphics card can be implemented.
On the other hand, how to solve the problem of system stability, how to design an intuitive and powerful control software, how to solve various problems of data transmission under high bus bandwidth, etc., all require a strong R&D team and a solid financial foundation. Experience is required. That is to say, the high-end PCI-E bus architecture splicer not only needs to meet the most basic applications such as signal acquisition, processing, and splicing, but also needs more investment in the design of system stability and software ease of use. Make the splicer meet a variety of harsh application environments.
However, it should be noted that most of the bus architecture splicers use the Windows operating system. Once attacked by a virus, the system may be paralyzed and the display will stop. Moreover, due to the use of a customized graphics card, the resolution of each output channel generally needs to comply with the VESA (Video Electronics Standards Association) standard, and it is not possible to define non-standard resolution output, nor define different resolutions for each channel.
(3) Distributed network architecture
The distributed network architecture splicer usually adopts a node-type hardware structure, and each input and output node is independently separated, and is connected to the central switch through twisted-pair cables for interactive transmission of data.
Its core is a set of advanced video encoding and decoding technology. Through various signal input nodes, the collected DVI, VGA, YPbPr, CVBS, 3G-SDI and other signals are processed and encoded, and encoded through a dedicated network communication protocol. After the video flows through the central switch, it is transmitted to the output node for decoding, and converted into a DVI digital signal for output to the display terminal.
The synchronization of output nodes becomes the key to the application of this system. One way is to directly send the synchronization code through the network to realize the synchronous output of multiple output nodes. However, due to the existence of the bit error rate of the network, after this method runs for a period of time, there will still be a phenomenon that the output is out of synchronization. Another method is to physically connect multiple output nodes through the SYNC interface, select one output node as the host, and actively send synchronization codes to other output nodes, so that all output nodes receive synchronization signals at the same time, realizing true frame synchronization Output, to ensure that the display image is complete, and there is no tearing at the screen splicing.
At present, there are more and more applications of distributed network architecture splicing systems. Due to its distributed characteristics, it is convenient for the integrated wiring of the entire building and the centralized management of multiple display terminals in different areas. With the help of advanced visualization software, it can provide users with humanized, visualized and integrated services.
However, limited by bandwidth and codec technology, the distributed network architecture does not currently support the access of dual-link DVI digital signals and HDMI signals. At the same time, frame buffering is required for encoding, processing, decoding, signal synchronous output, etc., so there is a gap compared with other several splicing technologies in terms of real-time data. In addition, when the number of points to be displayed exceeds 1920×1200 resolution images (more than two signal input nodes are required), the resynchronization output of the input signals of multiple synchronization sources cannot be guaranteed.
(4) Hybrid architecture
Hybrid architecture generally refers to a splicer or splicing system that combines two or more of the above three splicing technologies.
For example, PCI+ hardware backplane bus architecture splicer, its system control and image processing are implemented independently. The PCI bus is responsible for system control and runs the operating system in the background; the hardware backplane bus is responsible for video image processing, allowing the system to synchronize a large number of high-resolution input signals while still maintaining real-time operational performance and performance at full frame rate. The best image quality while ensuring the synchronization of the output signal. For important emergency places, it can ensure that the screen is never black. Even if the operating system responsible for the PCI bus fails or is infected by viruses, the dedicated backplane graphics processing bus can ensure that external video images are displayed at any time.
Through the hybrid architecture, it can be applied comprehensively and learn from each other's strengths, which greatly increases the stability of the system. This is also the development direction of splicing technology in the future, and has a broader application space.